Issued Patents 2005
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6967149 | Storage structure with cleaved layer | Neal Meyer, Andrew L. Van Brocklin, Warren B. Jackson, Kenneth J. Eldredge | 2005-11-22 |
| 6958946 | Memory storage device which regulates sense voltages | Andrew L. Van Brocklin, John Da Cunha | 2005-10-25 |
| 6940085 | Memory structures | Andrew Koll, Dennis Lazaroff, Andrew L. Van Brocklin | 2005-09-06 |
| 6917532 | Memory storage device with segmented column line array | Andrew L. Van Brocklin | 2005-07-12 |
| 6893951 | Vertical interconnection structure and methods | Andrew L. Van Brocklin | 2005-05-17 |
| 6879525 | Feedback write method for programmable memory | Andrew L. Van Brocklin, S. Jonathan Wang | 2005-04-12 |
| 6873543 | Memory device | Kenneth K. Smith, Andrew VanBrocklin, Frederick Perner, Kenneth J. Eldredge | 2005-03-29 |
| 6870751 | Low-energy writing in cross-point array memory devices | Andrew L. Van Brocklin | 2005-03-22 |
| 6858883 | Partially processed tunnel junction control element | Janice H. Nickel, Andrew L. Van Brocklin | 2005-02-22 |
| 6842369 | Intermesh memory device | Andrew Koll, Andrew L. Van Brocklin | 2005-01-11 |
| 6839263 | Memory array with continuous current path through multiple lines | Andrew VanBrocklin, Warren B. Jackson | 2005-01-04 |
| 6839275 | Memory system having control circuit configured to receive data, provide encoded received data to match a fault pattern in the array of memory cells | Andrew L. Van Brocklin, Kenneth K. Smith, Kenneth J. Eldredge | 2005-01-04 |