Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6969656 | Method and circuit for multiplying signals with a transistor having more than one independent gate structure | Yang Du | 2005-11-29 |
| 6967143 | Semiconductor fabrication process with asymmetrical conductive spacers | Ramachandran Muralidhar | 2005-11-22 |
| 6951783 | Confined spacers for double gate transistor semiconductor fabrication process | Rode R. Mora, Bich-Yen Nguyen, Tab A. Stephens, Anne Vandooren | 2005-10-04 |
| 6921700 | Method of forming a transistor having multiple channels | Marius Orlowski | 2005-07-26 |
| 6903967 | Memory with charge storage locations and adjacent gate structures | Robert F. Steimle, Ramachandran Muralidhar | 2005-06-07 |
| 6838322 | Method for forming a double-gated semiconductor device | Daniel T. Pham, Alexander L. Barr, Bich-Yen Nguyen, Anne Vandooren, Ted R. White | 2005-01-04 |