Issued Patents 2005
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6973041 | Path AIS insertion for concatenated payloads across multiple processors | Douglas E. Duschatko, Lane B. Quibodeaux, Andrew J. Thurston | 2005-12-06 |
| 6957246 | Buffer status in an asymmetrical gap environment | Stephen Patrick Kolecki | 2005-10-18 |
| 6934305 | Method and apparatus for detecting errors in a backplane frame | Douglas E. Duschatko, Lane B. Quibodeaux, Andrew J. Thurston | 2005-08-23 |
| 6856629 | Fixed algorithm for concatenation wiring | Vahid Parsi | 2005-02-15 |