Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6943060 | Method for fabricating integrated circuit package with solder bumps | — | 2005-09-13 |
| 6861798 | Tailored spacer wall coatings for reduced secondary electron emission | Lawrence S. Pan, Donald R. Schropp, Jr., Vasil M. Chakarov, John K. O'Reilly, George B. Hopple +6 more | 2005-03-01 |