Issued Patents 2005
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6947324 | Logic process DRAM | Winston Lee, Sehat Sutardja | 2005-09-20 |
| 6891221 | Array architecture and process flow of nonvolatile memory devices for mass storage applications | Hung-Sheng Chen, Vei-Han Chan | 2005-05-10 |
| 6862223 | MONOLITHIC, COMBO NONVOLATILE MEMORY ALLOWING BYTE, PAGE AND BLOCK WRITE WITH NO DISTURB AND DIVIDED-WELL IN THE CELL ARRAY USING A UNIFIED CELL STRUCTURE AND TECHNOLOGY WITH A NEW SCHEME OF DECODER AND LAYOUT | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma, Koucheng Wu | 2005-03-01 |
| 6850438 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2005-02-01 |
| 6839278 | Highly-integrated flash memory and mask ROM array architecture | Fu-Chang Hsu | 2005-01-04 |