Issued Patents 2005
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6981230 | On-chip power-ground inductance modeling using effective self-loop-inductance | Shen Lin, Weize Xie, Richard K. Chou | 2005-12-27 |
| 6981231 | System and method to reduce leakage power in an electronic device | Weize Xie, Shen Lin, Osamu Nakagawa | 2005-12-27 |
| 6925555 | System and method for determining a plurality of clock delay values using an optimization algorithm | Shen Lin, Osamu Nakagawa, Weize Xie | 2005-08-02 |