Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6875560 | Testing multiple levels in integrated circuit technology development | Paul J. Steffan, Shivananda Shetty | 2005-04-05 |
| 6864107 | Determination of nonphotolithographic wafer process-splits in integrated circuit technology development | Shivananda Shetty | 2005-03-08 |