Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6968545 | Method and apparatus for no-latency conditional branching | Alan S. Krech, Jr. | 2005-11-22 |
| 6851076 | Memory tester has memory sets configurable for use as error catch RAM, Tag RAM's, buffer memories and stimulus log RAM | John Howard Cook, III, Preet Paul Singh | 2005-02-01 |