Issued Patents 2004
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6809550 | High speed zero DC power programmable logic device (PLD) architecture | Saroj Pathak, James E. Payne, Victor Nguyen | 2004-10-26 |
| 6744291 | Power-on reset circuit | James E. Payne, Neville Ichhaporia, Jami Wang | 2004-06-01 |