Issued Patents 2004
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6809550 | High speed zero DC power programmable logic device (PLD) architecture | Saroj Pathak, James E. Payne, Harry Kuo | 2004-10-26 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6809550 | High speed zero DC power programmable logic device (PLD) architecture | Saroj Pathak, James E. Payne, Harry Kuo | 2004-10-26 |