MN

Masatake Nakano

SC Shin-Etsu Handotai Co.: 2 patents #6 of 65Top 10%
ST S.O.I. Tec Silicon On Insulator Technologies: 1 patents #4 of 10Top 40%
Overall (2004): #51,245 of 270,089Top 20%
2
Patents 2004

Issued Patents 2004

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6797632 Bonded wafer producing method and bonded wafer Kiyoshi Mitani, Shinichi Tomizawa 2004-09-28
6720640 Method for reclaiming delaminated wafer and reclaimed delaminated wafer Susumu Kuwabara, Kiyoshi Mitani, Naoto Tate, Thierry Barge, Christophe Maleville 2004-04-13