KM

Kiyoshi Mitani

SC Shin-Etsu Handotai Co.: 4 patents #1 of 65Top 2%
ST S.O.I. Tec Silicon On Insulator Technologies: 1 patents #4 of 10Top 40%
📍 Osaka, NC: #1 of 2 inventorsTop 50%
Overall (2004): #13,905 of 270,089Top 6%
4
Patents 2004

Issued Patents 2004

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6797632 Bonded wafer producing method and bonded wafer Masatake Nakano, Shinichi Tomizawa 2004-09-28
6784494 Production method for SOI wafer and SOI wafer 2004-08-31
6720640 Method for reclaiming delaminated wafer and reclaimed delaminated wafer Susumu Kuwabara, Naoto Tate, Masatake Nakano, Thierry Barge, Christophe Maleville 2004-04-13
6716722 Method of producing a bonded wafer and the bonded wafer Jun-ichiro Furihata 2004-04-06