PR

Paul Rodman

KT Kabushiki Kaisha Toshiba: 1 patents #648 of 2,092Top 35%
MT Mips Technologies: 1 patents #7 of 25Top 30%
RE Reshape: 1 patents #2 of 4Top 50%
📍 Ashland, MA: #2 of 23 inventorsTop 9%
🗺 Massachusetts: #740 of 6,583 inventorsTop 15%
Overall (2004): #46,700 of 270,089Top 20%
2
Patents 2004

Issued Patents 2004

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6757874 Facilitating verification in abutted-pin hierarchical physical design Peter Dahl, Byron Dickinson, Margie Levine 2004-06-29
6691221 Loading previously dispatched slots in multiple instruction dispatch buffer before dispatching remaining slots for parallel execution Chandra Joshi, Peter Hsu, Monica R. Nofal 2004-02-10