YK

Yasuhiko Kouno

RT Renesas Technology: 2 patents #233 of 1,436Top 20%
📍 Naka, JP: #1 of 12 inventorsTop 9%
Overall (2004): #34,385 of 270,089Top 15%
2
Patents 2004

Issued Patents 2004

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6821867 Method for forming grooves in the scribe region to prevent a warp of a semiconductor substrate Nobuyoshi Matsuura, Hideo Miura, Masaharu Kubo 2004-11-23
6803294 Semiconductor wafer and manufacturing method of semiconductor device Hideo Miura, Nobuyoshi Matsuura, Masaharu Kubo 2004-10-12