JL

Jun Li

CS Cadence Design Systems: 1 patents #23 of 106Top 25%
📍 Hsinchu, CA: #20 of 60 inventorsTop 35%
Overall (2004): #184,438 of 270,089Top 70%
1
Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6721929 High accuracy timing model for integrated circuit verification Hong Zhao, Hsien-Yen Chiu 2004-04-13