Hsien-Yen Chiu

CS Cadence Design Systems: 1 patents #23 of 106Top 25%

📍 Sunnyvale, CA: #346 of 1,092 inventorsTop 35%

🗺 California: #8,555 of 28,370 inventorsTop 35%

Overall (2004): #206,285 of 270,089Top 80%

Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #	Title	Co-Inventors	Date
6721929	High accuracy timing model for integrated circuit verification	Jun Li, Hong Zhao	2004-04-13