Issued Patents 2004
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6812753 | System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal | — | 2004-11-02 |
| 6798259 | System and method to improve the efficiency of synchronous mirror delays and delay locked loops | — | 2004-09-28 |
| 6779126 | Phase detector for all-digital phase locked and delay locked loops | R. Jacob Baker | 2004-08-17 |
| 6774690 | Digital dual-loop DLL design using coarse and fine loops | R. Jacob Baker | 2004-08-10 |
| 6762974 | Method and apparatus for establishing and maintaining desired read latency in high-speed DRAM | Brian Johnson, Brent Keeth | 2004-07-13 |
| 6759882 | System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal | — | 2004-07-06 |