Issued Patents 2004
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6835623 | NMOS ESD protection device with thin silicide and methods for making same | Wei-Tsun Shiau, Jerry Hu | 2004-12-28 |
| 6791862 | Junction-isolated depletion mode ferroelectric memory devices | Brian W. Huber | 2004-09-14 |
| 6767810 | Method to increase substrate potential in MOS transistors used in ESD protection circuits | Amitava Chatterjee, Youngmin Kim | 2004-07-27 |
| 6764909 | Structure and method of MOS transistor having increased substrate resistance | Zhiqiang Wu, Che-Jen Hu | 2004-07-20 |
| 6724050 | ESD improvement by a vertical bipolar transistor with low breakdown voltage and high beta | Zhiqiang Wu | 2004-04-20 |