Issued Patents 2004
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6812131 | Use of sacrificial inorganic dielectrics for dual damascene processes utilizing organic intermetal dielectrics | Joseph Kennedy, Anna George | 2004-11-02 |
| 6809018 | Dual salicides for integrated circuits | — | 2004-10-26 |
| 6790743 | [Method to relax alignment accuracy requirement in fabrication for integrated circuit] | — | 2004-09-14 |
| 6774051 | Method for reducing pitch | Chia-Chi Chung, Ming-Chung Liang, Jerry Lai | 2004-08-10 |
| 6770975 | Integrated circuits with multiple low dielectric-constant inter-metal dielectrics | Shi-Qing Wang, James Hao-An Chen Lin | 2004-08-03 |
| 6750150 | Method for reducing dimensions between patterns on a photoresist | Shin-Yi Tsai, Ming-Chung Liang | 2004-06-15 |
| 6734064 | Method for fabricating read only memory including forming masking layers with openings and pre-coding the cell and peripheral regions | Tahorng Yang, Cheng-Chen Calvin Hsueh, Ching-Yu Chang | 2004-05-11 |
| 6713354 | Coding method for mask ROM | — | 2004-03-30 |
| 6709923 | Method for manufacturing an array structure in integrated circuits | — | 2004-03-23 |