RS

Ranko Scepanovic

Lsi Logic: 6 patents #7 of 528Top 2%
📍 San Jose, CA: #77 of 2,805 inventorsTop 3%
🗺 California: #613 of 28,370 inventorsTop 3%
Overall (2004): #5,069 of 270,089Top 2%
6
Patents 2004

Issued Patents 2004

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
6804811 Process for layout of memory matrices in integrated circuits Alexander E. Andreev, Ivan Pavisic 2004-10-12
6795954 Method of decreasing instantaneous current without affecting timing Alexander E. Andreev 2004-09-21
6785699 Prefix comparator Alexander E. Andreev 2004-08-31
6760896 Process layout of buffer modules in integrated circuits Alexander E. Andreev, Ivan Pavisic 2004-07-06
6735600 Editing protocol for flexible search engines Alexander E. Andreev 2004-05-11
6704915 Process for fast cell placement in integrated circuit design Alexander E. Andreev, Mikhail I. Grinchuk 2004-03-09