RK

Rajiv Kapur

Lsi Logic: 1 patents #184 of 528Top 35%
📍 Sunnyvale, CA: #346 of 1,092 inventorsTop 35%
🗺 California: #8,555 of 28,370 inventorsTop 35%
Overall (2004): #134,514 of 270,089Top 50%
1
Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6725389 Method for minimizing clock skew by relocating a clock buffer until clock skew is within a tolerable limit Alexander Tetelbaum 2004-04-20