Issued Patents 2004
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6826099 | 2T2C signal margin test mode using a defined charge and discharge of BL and /BL | Hans-Oliver Joachim, Thomas Roehr | 2004-11-30 |
| 6807084 | FeRAM memory device | Hans-Oliver Joachim | 2004-10-19 |
| 6800890 | Memory architecture with series grouped by cells | Rainer Bruchhaus, Andreas Hilliger | 2004-10-05 |
| 6731554 | 2T2C signal margin test mode using resistive element | Michael Jacob, Thomas Roehr, Nobert Rehm | 2004-05-04 |
| 6731529 | Variable capacitances for memory cells within a cell group | Michael Jacob, Norbert Rehm, Daisaburo Takashima | 2004-05-04 |
| 6720598 | Series memory architecture | — | 2004-04-13 |
| 6717431 | Method for semiconductor yield loss calculation | Dieter Rathei, Luis G. Andrade, Robert Petter, Thomas Steven Taylor, Babatunde Ashiru +3 more | 2004-04-06 |
| 6707699 | Historical information storage for integrated circuits | Michael Jacob, Norbert Rehm, Hans-Oliver Joachim | 2004-03-16 |