Issued Patents 2004
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6790739 | Structure and methods for process integration in vertical DRAM cell fabrication | Rajeev Malik, Jochen Beintner, Rama Divakaruni | 2004-09-14 |
| 6767781 | Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask | Jonathan E. Faltermeier, Ramachandra Divakaruni, Wolfgang Bergner | 2004-07-27 |
| 6727539 | Embedded vertical DRAM arrays with silicided bitline and polysilicon interconnect | Ramachandra Divakaruni, Ulrike Gruening, Jack A. Mandelman, Carl Radens | 2004-04-27 |
| 6713835 | Method for manufacturing a multi-level interconnect structure | David V. Horak, Charles W. Koburger, III, Peter H. Mitchell | 2004-03-30 |
| 6686668 | Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask | Johnathan E. Faltermeier, Ramachandra Divakaruni, Wolfgang Bergner | 2004-02-03 |