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Jeffrey W. Sleight

IBM: 1 patents #1,866 of 5,464Top 35%
📍 Ridgefield, CT: #25 of 68 inventorsTop 40%
🗺 Connecticut: #746 of 2,707 inventorsTop 30%
Overall (2004): #195,147 of 270,089Top 75%
1
Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6821833 Method for separately optimizing thin gate dielectric of PMOS and NMOS transistors within the same semiconductor chip and device manufactured thereby Anthony I. Chou, Toshiharu Furukawa, Patrick R. Varekamp, Akihisa Sekiguchi 2004-11-23