Issued Patents 2004
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6819591 | Method for erasing a memory sector in virtual ground architecture with reduced leakage current | Ming-Huei Shieh, Santosh Yachareni, Pau-Ling Chen | 2004-11-16 |
| 6813189 | System for using a dynamic reference in a double-bit cell memory | — | 2004-11-02 |
| 6813735 | I/O based column redundancy for virtual ground with 2-bit cell flash memory | Pau-Ling Chen | 2004-11-02 |
| 6791880 | Non-volatile memory read circuit with end of life simulation | Binh Quang Le, Pau-Ling Chen, Darlene Hamilton, Edward Hsia | 2004-09-14 |
| 6744666 | Method and system to minimize page programming time for flash memory devices | Santosh Yachareni, Ming-Huei Shieh, Pau-Ling Chen | 2004-06-01 |
| 6731703 | Reception power level calculating circuit and receiver using the same | — | 2004-05-04 |
| 6721370 | Phase correction circuit for radio communication apparatus | — | 2004-04-13 |
| 6713809 | Dual bit memory device with isolated polysilicon floating gates | Jusuke Ogura, Masaru Yano, Hideki Komori, Tuan Pham, Angela T. Hui | 2004-03-30 |