TS

Tomohiro Shiraishi

RT Renesas Technology: 1 patents #498 of 1,436Top 35%
Overall (2004): #96,231 of 270,089Top 40%
1
Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6696357 Method for manufacturing semiconductor integrated circuit devices using a conductive layer to prevent peeling between a bonding pad and an underlying insulating film Toshinori Imai, Tsuyoshi Fujiwara, Hiroshi Ashihara, Masaaki Yoshida 2004-02-24