CP

Cesar Payan

Cypress Semiconductor: 1 patents #74 of 239Top 35%
📍 San Jose, CA: #938 of 2,805 inventorsTop 35%
🗺 California: #8,555 of 28,370 inventorsTop 35%
Overall (2004): #249,858 of 270,089Top 95%
1
Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6800495 Lot-optimized wafer level burn-in Bo Jin 2004-10-05