SS

Sanjeev Saluja

CS Cadence Design Systems: 4 patents #4 of 106Top 4%
📍 Gurugram, IN: #1 of 1 inventorsTop 100%
Overall (2004): #11,923 of 270,089Top 5%
4
Patents 2004

Issued Patents 2004

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6832357 Reducing datapath widths by rebalancing data flow topology Anmol Mathur 2004-12-14
6807651 Procedure for optimizing mergeability and datapath widths of data flow graphs Anmol Mathur 2004-10-19
6772398 Reducing datapath widths responsively to upper bound on information content Anmol Mathur 2004-08-03
6772399 Enhancing mergeability of datapaths and reducing datapath widths responsively to required precision Anmol Mathur 2004-08-03