Issued Patents 2004
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6784101 | Formation of high-k gate dielectric layers for MOS devices fabricated on strained lattice semiconductor substrates with minimized stress relaxation | Bin Yu | 2004-08-31 |
| 6777281 | Maintaining LDD series resistance of MOS transistors by retarding dopant segregation | Daniel Kadosh, Scott Luning, Akif Sultan | 2004-08-17 |
| 6743685 | Semiconductor device and method for lowering miller capacitance for high-speed microprocessors | Michael Duane, Scott Luning | 2004-06-01 |
| 6727136 | Formation of ultra-shallow depth source/drain extensions for MOS transistors | James F. Buller, Derick J. Wristers, Akif Sultan | 2004-04-27 |
| 6727558 | Channel isolation using dielectric isolation structures | Michael Duane, Massud Aminpur, Scott Luning | 2004-04-27 |