YK

Young Gon Kim

IL Integrated Memory Logic: 1 patents #1 of 7Top 15%
📍 Daejeon, CA: #20 of 50 inventorsTop 40%
Overall (2003): #86,821 of 273,478Top 35%
1
Patents 2003

Issued Patents 2003

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6647506 Universal synchronization clock signal derived using single forward and reverse direction clock signals even when phase delay between both signals is greater than one cycle Jeongsik Yang, Chiayao S. Tung, Shuen-Chin Chang, Yong-Eun Park 2003-11-11