KM

Kiyoshi Mitani

SC Shin-Etsu Handotai Co.: 2 patents #14 of 67Top 25%
ST S.O.I. Tec Silicon On Insulator Technologies: 1 patents #1 of 7Top 15%
📍 Osaka, NC: #1 of 1 inventorsTop 100%
Overall (2003): #56,554 of 273,478Top 25%
2
Patents 2003

Issued Patents 2003

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6596610 Method for reclaiming delaminated wafer and reclaimed delaminated wafer Susumu Kuwabara, Naoto Tate, Masatake Nakano, Thierry Barge, Christophe Maleville 2003-07-22
6566233 Method for manufacturing bonded wafer Isao Yokokawa 2003-05-20