LC

Laurence H. Cooke

CS Cadence Design Systems: 2 patents #13 of 82Top 20%
📍 Los Gatos, CA: #61 of 332 inventorsTop 20%
🗺 California: #4,287 of 28,521 inventorsTop 20%
Overall (2003): #55,585 of 273,478Top 25%
2
Patents 2003

Issued Patents 2003

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6651237 System and method for H-Tree clocking layout Kumar Venkatramani 2003-11-18
6631504 Hierarchical test circuit structure for chips with multiple circuit blocks Bulent Dervisoglu 2003-10-07