Issued Patents 2003
Showing 1–25 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6671214 | Methods of operating a multiple bit line column redundancy scheme having primary and redundant local and global bit lines | Ebrahim Abedifard | 2003-12-30 |
| 6667932 | Synchronous flash memory with virtual segment architecture | Kevin C. Widmer | 2003-12-23 |
| 6665221 | Multiple bit line column redundancy with primary local and global bit lines and redundant local and global bit lines | Ebrahim Abedifard | 2003-12-16 |
| 6662279 | DQ mask to force internal data to mask external data in a flash memory | — | 2003-12-09 |
| 6657899 | Flash memory with multiple status reading capability | — | 2003-12-02 |
| 6657913 | Array organization for high-performance memory devices | Ebrahim Abedifard | 2003-12-02 |
| 6657900 | Non-volatile memory device with erase address register | — | 2003-12-02 |
| 6654307 | DDR synchronous flash memory with virtual segment architecture | Kevin C. Widmer, Cliff Zitlaw | 2003-11-25 |
| 6654847 | Top/bottom symmetrical protection scheme for flash | Kevin C. Widmer | 2003-11-25 |
| 6654313 | Burst read addressing in a non-volatile memory device | — | 2003-11-25 |
| 6654311 | Synchronous flash memory command sequence | Cliff Zitlaw | 2003-11-25 |
| 6654289 | Non-volatile memory device with erase address register | — | 2003-11-25 |
| 6646921 | Non-volatile memory device with erase address register | — | 2003-11-11 |
| 6625081 | Synchronous flash memory with virtual segment architecture | Kevin C. Widmer | 2003-09-23 |
| 6621762 | Non-volatile delay register | — | 2003-09-16 |
| 6621751 | Method and apparatus for programming row redundancy fuses so decoding matches internal pattern of a memory array | Ebrahim Abedifard | 2003-09-16 |
| 6614689 | Non-volatile memory having a control mini-array | — | 2003-09-02 |
| 6615307 | Flash with consistent latency for read operations | — | 2003-09-02 |
| 6614691 | Flash memory having separate read and write paths | — | 2003-09-02 |
| 6614690 | Non-volatile memory having a control mini-array | — | 2003-09-02 |
| 6606269 | Flash memory with multiple status reading capability | — | 2003-08-12 |
| 6598113 | State machine having each execution cycle directly connected to a suspend cycle to achieve fast suspend of erase operation in flash memories | — | 2003-07-22 |
| 6587383 | Erase block architecture for non-volatile memory | Kevin C. Widmer | 2003-07-01 |
| 6587903 | Soft programming for recovery of overerasure | — | 2003-07-01 |
| 6584025 | Read compression in a memory | Dean Nobunaga | 2003-06-24 |