Issued Patents 2003
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6671214 | Methods of operating a multiple bit line column redundancy scheme having primary and redundant local and global bit lines | Frankie F. Roohparvar | 2003-12-30 |
| 6667910 | Method and apparatus for discharging an array well in a flash memory device | Allahyar Vahidimolavi | 2003-12-23 |
| 6665221 | Multiple bit line column redundancy with primary local and global bit lines and redundant local and global bit lines | Frankie F. Roohparvar | 2003-12-16 |
| 6657913 | Array organization for high-performance memory devices | Frankie F. Roohparvar | 2003-12-02 |
| 6621751 | Method and apparatus for programming row redundancy fuses so decoding matches internal pattern of a memory array | Frankie F. Roohparvar | 2003-09-16 |
| 6566738 | Lead-over-chip leadframes | — | 2003-05-20 |
| 6560150 | Memory device testing | — | 2003-05-06 |
| 6504768 | Redundancy selection in memory devices with concurrent read and write | Frankie F. Roohparvar | 2003-01-07 |