Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6643832 | Virtual tree-based netlist model and method of delay estimation for an integrated circuit design | Partha Ray, Mikhail I. Grinchuk | 2003-11-04 |
| 6557144 | Netlist resynthesis program based on physical delay calculation | Aiguo Lu, Ivan Pavisic | 2003-04-29 |
| 6546539 | Netlist resynthesis program using structure co-factoring | Aiquo Lu, Ivan Pavisic | 2003-04-08 |
| 6505336 | Channel router with buffer insertion | Alexander E. Andreev, Anatoli Bolotov | 2003-01-07 |