EA

Egor A. Andreev

Lsi Logic: 1 patents #161 of 465Top 35%
📍 San Jose, CA: #929 of 2,756 inventorsTop 35%
🗺 California: #8,996 of 28,521 inventorsTop 35%
Overall (2003): #231,704 of 273,478Top 85%
1
Patents 2003

Issued Patents 2003

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6615397 Optimal clock timing schedule for an integrated circuit Alexander E. Andreev, Ivan Pavisic 2003-09-02