Issued Patents 2003
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6667904 | Multi-level non-volatile semiconductor memory device with verify voltages having a smart temperature coefficient | Ken Takeuchi | 2003-12-23 |
| 6657896 | Fail number detecting circuit of flash memory | Koji Hosono, Tamio Ikehashi, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi | 2003-12-02 |
| 6657891 | Semiconductor memory device for storing multivalued data | Noboru Shibata | 2003-12-02 |
| 6650578 | Semiconductor storage device and setting method thereof | Masatsugu Kojima, Noboru Shibata | 2003-11-18 |
| 6643188 | Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell | Jian Chen | 2003-11-04 |
| 6621738 | Semiconductor memory device | Hiroshi Nakamura, Toru Tanzawa | 2003-09-16 |
| 6611938 | Flash memory | Noboru Shibata, Toru Tanzawa | 2003-08-26 |
| 6600676 | Nonvolatile semiconductor memory device with a ROM block settable in the write or erase inhibit mode | Noboru Shibata | 2003-07-29 |
| 6574147 | Electrically erasable and programmable nonvolatile semiconductor memory with automatic write-verify controller | Yoshiyuki Tanaka, Hiroshi Nakamura, Hideko Odaira | 2003-06-03 |
| 6552930 | Semiconductor memory device and storage method thereof | Noboru Shibata | 2003-04-22 |
| 6549464 | Nonvolatile semiconductor memory device | Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai, Susumu Fujimura | 2003-04-15 |
| 6545909 | Nonvolatile semiconductor memory device | Kazunori Ohuchi, Toru Tanzawa, Ken Takeuchi | 2003-04-08 |
| 6525964 | Semiconductor memory device | Hiroshi Nakamura, Toru Tanzawa | 2003-02-25 |
| 6522580 | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states | Jian Chen, Yupin Fong, Khandker N. Quader | 2003-02-18 |
| 6507518 | Fail number detecting circuit of flash memory | Koji Hosono, Tamio Ikehashi, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi | 2003-01-14 |
| 6507508 | Pattern layout of transfer transistors employed in row decoder | Koji Hosono, Hiroshi Nakamura, Kenichi Imamiya | 2003-01-14 |