JL

Jiann-Cherng Lan

IN Intel: 3 patents #213 of 2,151Top 10%
📍 San Jose, CA: #249 of 2,756 inventorsTop 10%
🗺 California: #2,413 of 28,521 inventorsTop 9%
Overall (2003): #28,400 of 273,478Top 15%
3
Patents 2003

Issued Patents 2003

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6631093 Low power precharge scheme for memory bit lines Sudarshan Kumar, Wenjie Jiang, Gaurav Mehta, Sadhana Madhyastha 2003-10-07
6628539 Multi-entry register cell Sudarshan Kumar, Gaurav Mehta, Sadhana Madhyastha 2003-09-30
6629194 Method and apparatus for low power memory bit line precharge Sudarshan Kumar, Gaurav Mehta, Sadhana Madhyastha 2003-09-30