Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6631093 | Low power precharge scheme for memory bit lines | Sudarshan Kumar, Jiann-Cherng Lan, Wenjie Jiang, Sadhana Madhyastha | 2003-10-07 |
| 6628539 | Multi-entry register cell | Sudarshan Kumar, Sadhana Madhyastha, Jiann-Cherng Lan | 2003-09-30 |
| 6629194 | Method and apparatus for low power memory bit line precharge | Sudarshan Kumar, Sadhana Madhyastha, Jiann-Cherng Lan | 2003-09-30 |
| 6593776 | Method and apparatus for low power domino decoding | Sudarshan Kumar, Vivek Joshi | 2003-07-15 |