Issued Patents 2003
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6650163 | Clock generator for integrated circuit | Jeffrey L. Burns, Alan J. Drake, Uttam Shyamalindu Ghoshal | 2003-11-18 |
| 6636996 | Method and apparatus for testing pipelined dynamic logic | — | 2003-10-21 |
| 6629235 | Condition code register architecture for supporting multiple execution units | Brian Flachs, Harm Peter Hofstee | 2003-09-30 |
| 6598153 | Processor and method that accelerate evaluation of pairs of condition-setting and branch instructions | Brian Flachs, Harm Peter Hofstee | 2003-07-22 |
| 6594679 | Leading-zero anticipator having an independent sign bit determination module | Kyung Tek Lee, Sang Hoo Dhong | 2003-07-15 |
| 6580293 | Body-contacted and double gate-contacted differential logic circuit and method of operation | Kerry Bernstein, Peter E. Cottrell, Stephen V. Kosonocky, David Meltzer, Edward J. Nowak +1 more | 2003-06-17 |
| 6578063 | 5-to-2 binary adder | Nobuo Kojima, Ohsang Kwon | 2003-06-10 |
| 6570408 | Charge recovery for dynamic circuits | — | 2003-05-27 |
| 6545512 | Low leakage sleep mode for dynamic circuits | — | 2003-04-08 |
| 6529924 | Method and apparatus for generating shift amount signals for an alignment shifter | — | 2003-03-04 |
| 6529084 | Interleaved feedforward VCO and PLL | David William Boerstler, Juan-Antonio Carballo, Gary Dale Carpenter, Hung C. Ngo | 2003-03-04 |
| 6529082 | Dual mode charge pump | David William Boerstler, Gary Dale Carpenter, Hung C. Ngo | 2003-03-04 |
| 6515530 | Dynamically scalable low voltage clock generation system | David William Boerstler, Gary Dale Carpenter, Hung C. Ngo | 2003-02-04 |