Issued Patents 2003
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6571374 | Invention to allow multiple layouts for a schematic in hierarchical logical-to-physical checking on chips | Stephen L. Runyon, Robert T. Sayah, Steven E. Washburn | 2003-05-27 |
| 6567958 | Invention to allow hierarchical logical-to-physical checking on chips | Stephen L. Runyon | 2003-05-20 |