Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6661281 | Method for reducing current surge using multi-stage ramp shunting | Osamu Nakagawa, Shen Lin, Weize Xie, Xuejue Huang | 2003-12-09 |
| 6621305 | Partial swing low power CMOS logic circuits | Osamu Nakagawa, Shen Lin, Weize Xie, Kenynmyung Lee | 2003-09-16 |
| 6566924 | Parallel push algorithm detecting constraints to minimize clock skew | Shen Lin, Keunmyung Lee, Osamu Nakagawa, Weize Xie | 2003-05-20 |
| 6567960 | System for improving circuit simulations by utilizing a simplified circuit model based on effective capacitance and inductance values | Yu Cao, Osamu Nakagawa, Shen Lin, Weize Xie | 2003-05-20 |