Issued Patents 2003
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6534869 | Method for reducing stress-induced voids for 0.25 &mgr;m micron and smaller semiconductor chip technology by annealing interconnect lines prior to ILD deposition and semiconductor chip made thereby | Paul R. Besser, Minh Van Ngo | 2003-03-18 |