AK

Alireza S. Kaviani

AM AMD: 2 patents #282 of 1,053Top 30%
📍 San Jose, CA: #437 of 2,756 inventorsTop 20%
🗺 California: #4,287 of 28,521 inventorsTop 20%
Overall (2003): #76,607 of 273,478Top 30%
2
Patents 2003

Issued Patents 2003

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6603332 Configurable logic block for PLD with logic gate for combining output with another configurable logic block Sundararajarao Mohan, Ralph D. Wittig, Steven P. Young, Bernard J. New 2003-08-05
6556042 FPGA with improved structure for implementing large multiplexers 2003-04-29