HT

Hsiao-Hui Tseng

TSMC: 2 patents #107 of 614Top 20%
📍 Tainan, TW: #21 of 212 inventorsTop 10%
Overall (2002): #61,666 of 266,432Top 25%
2
Patents 2002

Issued Patents 2002

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6436762 Method for improving bit line to capacitor electrical failures on DRAM circuits using a wet etch-back to improve the bit-line-to-capacitor overlay margins Kuo-Chyuan Tzeng, Tse-Liang Ying, Min-Hsiung Chiang, Chung-Wei Chang 2002-08-20
6383863 Approach to integrate salicide gate for embedded DRAM devices Min-Hsiung Chiang, Hsien-Yuan Chang, Chung-Wei Chang, Kuo-Chyuan Tzeng 2002-05-07