Issued Patents 2002
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6436762 | Method for improving bit line to capacitor electrical failures on DRAM circuits using a wet etch-back to improve the bit-line-to-capacitor overlay margins | Kuo-Chyuan Tzeng, Tse-Liang Ying, Min-Hsiung Chiang, Hsiao-Hui Tseng | 2002-08-20 |
| 6383863 | Approach to integrate salicide gate for embedded DRAM devices | Min-Hsiung Chiang, Hsiao-Hui Tseng, Hsien-Yuan Chang, Kuo-Chyuan Tzeng | 2002-05-07 |