Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6444526 | Simplified process for defining the tunnel area in non-aligned, non-volatile semiconductor memory cells | Matteo Patelmo, Giovanna Dalla Libera, Bruno Vajana | 2002-09-03 |
| 6420769 | Method for manufacturing electronic devices having HV transistors and LV transistors with salicided junctions | Matteo Patelmo, Giovanna Dalla Libera, Bruno Vajana | 2002-07-16 |
| 6414349 | High efficiency memory device | Giovanna Dalla Libera, Matteo Patelmo, Bruno Vajana | 2002-07-02 |
| 6396101 | Method for manufacturing electronic devices comprising non-volatile memory cells and LV transistors with salicided junctions | Matteo Patelmo, Giovanna Dalla Libera, Bruno Vajana | 2002-05-28 |
| 6351008 | Method for manufacturing electronic devices having non-volatile memory cells and LV transistors with salicided junctions | Matteo Patelmo, Giovanna Dalla Libera, Bruno Vajana | 2002-02-26 |