Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6501147 | Process for manufacturing electronic devices comprising high voltage MOS transistors, and electronic device thus obtained | Bruno Vajana | 2002-12-31 |
| 6444526 | Simplified process for defining the tunnel area in non-aligned, non-volatile semiconductor memory cells | Giovanna Dalla Libera, Nadia Galbiati, Bruno Vajana | 2002-09-03 |
| 6420769 | Method for manufacturing electronic devices having HV transistors and LV transistors with salicided junctions | Nadia Galbiati, Giovanna Dalla Libera, Bruno Vajana | 2002-07-16 |
| 6414349 | High efficiency memory device | Giovanna Dalla Libera, Bruno Vajana, Nadia Galbiati | 2002-07-02 |
| 6396101 | Method for manufacturing electronic devices comprising non-volatile memory cells and LV transistors with salicided junctions | Giovanna Dalla Libera, Nadia Galbiati, Bruno Vajana | 2002-05-28 |
| 6351008 | Method for manufacturing electronic devices having non-volatile memory cells and LV transistors with salicided junctions | Giovanna Dalla Libera, Nadia Galbiati, Bruno Vajana | 2002-02-26 |
| 6350652 | Process for manufacturing nonvolatile memory cells with dimensional control of the floating gate regions | Giovanna Dalla Libera, Bruno Vajana | 2002-02-26 |
| 6340828 | Process for manufacturing nonvolatile memory cells with dimensional control of the floating gate regions | Giovanna Dalla Libera, Bruno Vajana | 2002-01-22 |