Issued Patents 2002
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6449756 | Method for accurate and efficient updates of timing information logic synthesis, placement and routing for integrated circuit design | Sharad Malik, Lawrence Pileggi, Abhijeet Chakraborty, Douglas B. Boyle | 2002-09-10 |