Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6445029 | NVRAM array device with enhanced write and erase | Richard Q. Williams | 2002-09-03 |
| 6426524 | Fabricating a square spacer | Jed H. Rankin, Christa R. Willets, Arthur Paul Johnson | 2002-07-30 |
| 6420777 | Dual layer etch stop barrier | Eric Lee, Francis R. White | 2002-07-16 |
| 6413828 | Process using poly-buffered STI | — | 2002-07-02 |
| 6403482 | Self-aligned junction isolation | Nivo Rovedo | 2002-06-11 |
| 6391703 | Buried strap for DRAM using junction isolation technique | Nivo Rovedo, Rebecca D. Mih | 2002-05-21 |
| 6352895 | Method of forming merged self-aligned source and ONO capacitor for split gate non-volatile memory | — | 2002-03-05 |
| 6344373 | Antifuse structure and process | Arup Bhattacharyya, Robert M. Geffken, Robert K. Leidy | 2002-02-05 |